Diodes CS5519 Manuale Utente Scaricare il pdf

Data Sheet

Enhanced Multi-touch Capacitive Touch Screen Controller CS5519

Apr. 2013 Rev. 1. 0 BCD Semiconductor Manufacturing Limited

General Description

The CS5519 is a low-cost high-resolution single chip

solution for APA capacitive touch screen. It is an

8-bit single cycle 8051 microcontroller with I

Interface. The chip includes 8-bit successive

approximation analog-to-digital converters with an

C interface and multiplexer-switcher circuits for

flexible measurement of analog signal from APA

panel. An accurate switched-capacitor integrator is

built-in and it can auto calibrate the pixel parameters

for a wide range of capacitance on the touch screen

(0.1pF to 4pF). On-chip capacitor can replace

external component. This touch screen controller

(TSC) with CMOS integration circuit provides an

ideal choice for APA touch panel. The CS5519 is

specified over the temperature range of -40°C to

95°C.

The CS5519 is available in QFN-7×7-56 and

QFN-8×8-68 packages.

Features

•

Mutual Capacitive Touch Sensing

• Dual Power Supply: 2.8V to 3.6V Operation

Voltage; 1.6V to 2.0V Operation Voltage

•

Up to 38/30 Drive Lines and 22/17 Sense Lines

• Dedicated Internal Two-wire Serial Control Bus

C and UART between CS5519 and Host

•

Single-end Integrator with Programmable Gain

Control and Offset Control

• Multiplexed Analog Digitization with Two 8-bit

Resolution Odd/Even Scan SAR ADCs and Its

Dedicated 2X to 8X Accumulator XSRAM

Buffers

Features (Continued)

• Single Cycle 8051 CPU Core, Maximum Opera-

ting Clock up to 24MHz from IOSC (Zero Wait

State); 48MHz from IOSC(With Wait State)

4MHz to 48MHz Internal Oscillator (IOSC)

64K-byte Flash ROM

256-byte Internal SRAM and 12032-byte

XSRAM

Extra XSRAMs for AFE:

 896×12-bit×2 XSRAM for 8-bit SAR ADC

 896×8-bit XSRAM for 8-bit Parasitical

Capacitor Compensator

Two 16-bit Timers T0/T1 and One 16-bit ECT

Timer T2

One I

C Slave Controller and One I

C Master

Controller Shared with the Same Port

 With Asynchronous I

C Slave Address

Detection Logic Design

4 General Purpose GPIO Pins

One External Interrupt Pin

One UART Data Transfer Output Pin

• ISP/IAP via I²C Port

• Operation Temperature Range: -40°C to 95°C

• Package Types: QFN-7×7-56 and QFN-8×8-68

• RoHS Compliance

•

Operating Mode:

Mode Description

Power-down No scan with power-down mode

Standard Higher scan rate when fingers are

on panel, IOSC can up to 4MHz

to 48MHz

Applications

• Mobile Phones

• Personal Digital Assistants

• Smart Hand-held or Gaming Devices

Figure 1. Package Types of CS5519

QFN-7×7-56

QFN-8×8-68

1 2 3 4 5 6 ... 16 17